Samsung and Hynix demonstrate DDR4 engineering samples
Samsung and Hynix have demonstrated working engineering samples of the upcoming DDR4 computer memory. The event has taken place at the ISSCC 2012 last week.
The DDR4 memory is expected to replace the current DDR3 memory sometime around 2014 but mass production is expected to begin this year using 20 nm technology.
The engineering sample that Samsung demonstrated achieves 2133 MHz effective clock speed at 1.2 V and was built using 30 nm technology. The sample of Hynix uses circuits built with 38 nm technology but runs at 2400 MHz at 1.2 V.
JEDEC, the standardization body that oversees memory development, has stated that the first DDR4 memory with capacity of 32 GB and ECC support will be used in the server market segment and will run at 2400 MHz maximum frequency. Desktop computers will enjoy DDR4 memory that will run between 2133 MHz and 3200 MHz. The top clock speed of 3200 MHz, however, has not been standardized yet but this will happen in the near future.