Toshiba cuts CPU cache power consumption by 85 per cent

Toshiba has brought some great news for chip makers and consumers by introducing a new innovative CPU technology that cuts CPU cache power consumption by up to 85 per cent.

The new technology is based on using a bit line power calculator (BLPC) and a digitally controllable retention circuit (DCRC) and works by reducing active and standby power consumption in temperatures that range from room temperature (RT) to high temperature (HT). The prototype that Toshiba developed has been found to reduce active and standby power consumption at 25 degrees Celsius by 27 per cent (BLPC) and 85 per cent (DCRC).

The new technology will soon find its place in various computer chips and mobile devices such as tablets, ultrabooks, notebooks and the like where it will reduce power usage when the CPU is idle thus saving on electricity costs and prolonging battery life.


Source: X-Bit Labs

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