AMD leaks Zen block diagram

AMD leaks Zen block diagram

The information that AMD works on entirely new processor architecture, called Zen, is hardly any news nowadays but until this moment we have had scarce information on the upcoming piece of silicon. This will now change as AMD has leaked, perhaps on purpose, a slide, which describes the upcoming Zen hardware.

The most important change in Zen is that AMD goes back to a monolithic core design from the modular architecture, found in Bulldozer. The new design is expected to bring significant instructions-per-clock (IPC) improvements to single-threaded applications, when compared to Bulldozer. Processor fans know that exactly single-threaded application performance is the Achilles’ heel of Bulldozer and AMD aims to provide much needed improvements there. So to fulfill this goal Zen will feature monolithic fetch and decode units and single integer and floating point blocks. As a comparison in Bulldozer two cores inside a module feature dedicated decode and integer units and share the floating-point block. The differences do not end here – Zen will come with six integer pipelines compared to four, found in each Bulldozer core. The integrated FPU has two large 256-bit FMAC (fused-multiply) units, compared to two 128-bit ones in Bulldozer. In addition each Zen core has 512 KB of L2 cache, which is much smaller than the 2 MB featured in Bulldozer. The reduction in L2 cache will not reduce performance, however, as Zen cores are likely to be much faster and less L2 cache dependent than the ones in Bulldozer. Finally a Zen chip will have a spacious L3 cache that all Zen cores will share as well as an integrated DDR4 memory controller and support for PCI-E 3.0.

The first Zen chips are expected in late 2016.


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