AMD details Jaguar, offers very powerful FPU
AMD’s Bobcat was the first company architecture aimed at low power devices and it was definitely a great accomplishment offering very modest power consumption and excellent computing performance not to mention the superior 3D graphics performance when compared to other ultra low power processors. Unfortunately for AMD Bobcat never really became popular due to Intel Atom’s dominance in this market field. Despite this fact AMD is determined to compete in the low power market and this is why the company is currently working on Bobcat’s successor – Jaguar.
AMD recently shared some details on the Jaguar architecture at the Hot Chips conference and according to the company’s presentation users of low power devices may be in for another great treat coming from AMD, as Jaguar seems to be another very powerful architecture this time especially stressing on floating-point performance. Indeed Jaguar will feature a very powerful FPU that will offer never seen SIMD and FPU performance in this market niche. According to AMD Jaguar will support all current SIMD instruction sets including SSE 4.1, SSE 4.2, AES, CLMUL, MOVBE, AVX, XSAVE, XSAVEOPT, FC16 and BMI. In addition to this SIMD galore the FPU pipelines of Jaguar will be doubled compared to Bobcat and thus the new chip will come with 128-bit FPU pipelines capable of executing 128-bit FPU operations in one clock cycle unlike Bobcat, which required two clock cycles for 128-bit floating point instructions.
Jaguar will still need two clock cycles for 256-bit AVX instructions but AMD decided to stick to 128-bit FPU pipelines due to two reasons – right now not much software takes advantage of AVX and then to keep Jaguar less complex, which will save on processor die size and power consumption. AMD also said that it would provide a 256-bit FPU in the future when such a need truly arises.
There isn’t an official Jaguar launch date as of now but one thing is for sure – multimedia applications will run great on such a chip.