JEDEC revises the HBM memory standard
The JEDEC Solid State Technology Association, which defines the standards for the electronics industry, has updated the high-bandwidth memory (HBM) standard with new specifications that pave the way for the introduction of the eagerly awaited HBM 2.0 memory generation.
Despite all expectations the new memory standard does not mention an official HBM 2.0 name but we all know that the new specs are designed for the new memory generation. Officially the standard has been changed from JEDS235 to JEDS235A, which might create confusion down the road but this is it. The new specification allow more flexibility – now manufacturers can use stacks of two, four and even eight HBM memory chips, which will allow the creation of HBM-enabled video cards with up to 32 GB of memory. The memory bus has not changed, though, and remains at 1024 bits but the memory bandwidth has been increased to 256 GB/sec per memory stack. Thus HBM 2.0-based video cards for example will be able to achieve memory bandwidth of 1 TB/sec when using 4 DRAM stacks. In addition the new standard includes a temperature control function that changes the way memory functions when a certain temperature threshold is exceeded.
“GPUs and CPUs continue to drive demand for more memory bandwidth and capacity, amid increasing display resolutions and the growth in computing datasets. HBM provides a compelling solution to reduce the IO power and memory footprint for our most demanding applications,” said Barry Wagner, JEDEC HBM Task Group Chairman.
HBM 2.0 video cards are expected later this year. Chances are that the upcoming NVIDIA Pascal GPU generation will use HBM 2.0 memory from the start.