Rambus Announces Highly Power-Efficient Memory Architecture

rambus-logoRambus Inc.  one of the world’s premier technology licensing companies specializing in high-speed memory architectures, today announced its Mobile Memory Initiative. This development effort focuses on high-bandwidth, low-power memory technologies targeted at achieving data rates of 4.3Gbps at best-in-class power efficiency.

With this performance, designers could realize more than 17Gigabytes per smecond of memory bandwidth from a single mobile DRAM device. These technologies enable a memory architecture ideal for next-generation smartphones, netbooks, portable gaming, and portable media products. Rambus will demonstrate a silicon test vehicle for its Mobile Memory Initiative at DesignCon 2009.


“As consumer expectations grow for more media-rich applications on their mobile devices, new memory solutions will be needed to keep pace with the rapidly increasing bandwidth requirements,” said Martin Scott, senior vice president of Research and Technology Development at Rambus. “With the breakthrough technologies developed through the Mobile Memory Initiative, Rambus enables a broad range of advanced mobile applications that will enrich the lives of consumers worldwide.”

Rambus has combined its high-bandwidth expertise with power-efficient signaling technology to create key innovations for its Mobile Memory Initiative, such as:

  • Very Low-Swing Differential Signaling — combines the robust signaling qualities of a differential architecture with innovative circuit techniques to greatly reduce active power consumption;
  • FlexClocking™ Architecture — a clock-forwarded and clock-distributed topology, enables high-speed operation and a simplified DRAM interface; and
  • Advanced Power State Management — in conjunction with the FlexClocking architecture, provides fast switching times between power-saving modes and delivers optimized power efficiency across a diverse range of usage profiles.

Building on innovations pioneered through the development of the award-winning XDR™ memory architecture, and through the Low-Power and Terabyte Bandwidth Initiatives, Rambus’ Mobile Memory Initiative also incorporates key innovations such as FlexPhase™ and Microthreading technology. For nearly 19 years, Rambus engineering teams have developed leadership innovations that enable faster signaling and lower power. Committed to the advanced research, development, and implementation of high-performance and power-efficient memory architectures, Rambus invests in advanced circuit design, high-speed logic interfaces, system engineering, signal and power integrity, verification, and testing. Rambus engineers and scientists have developed innovations resulting in over 1200 issued and pending patents worldwide.

For more information on the Mobile Memory Initiative, see a demonstration at the Rambus booth at DesignCon (#205) or visit the website at www.rambus.com/mobile.

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